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ram_verilog
- 本程序用verilog实现实现了RAM读写功能-This programe describe the properties of reading and writing ram.
ddpi_tx
- verilog语言编写的一个接口文件，使用乒乓ram-verilog language of an interface file, use the ping-pong ram
ProfiBus_Modbus_2008
- SPC3 PROGRAMS SP C3 PROGRAMS
InvMod_test
- verilog实现的1024位的大数模逆算法，引入RAM作为数据通道-verilog to achieve the 1024 Modular inverse algorithms, the introduction of RAM as a data channel
DW8051_ALL
- 包中包括, DW8051完整的Verilog HDL代码 两本手册: DesignWare Library DW8051 MacroCell, Datasheet DesignWare DW8051 MacroCell Databook 三篇51论文: 基于IP 核的PSTN 短消息终端SoC 软硬件协同设计 Embedded TCP/ IP Chip Based on DW8051 Core 以8051为核的SOC中的万年历的设计 -DW8051 is desi
ZBTSRAM
- 高速同步SRAM控制器参考设计VHDL代码-High-speed synchronous SRAM controller reference design VHDL code
fifo_test
- FIFO读写verilog程序，经本人验证，能够顺利运行。实现FPGA对fifo的控制。-the example of writing and reading the fifo ram of the fpag,i have already tested it.
in_out_put
- 双向RAM的Verilog程序，能实现双向传数据-The Verilog bidirectional RAM process, to achieve a two-way mass data
61EDA_H182
- ram模块的Verilog程序的实现，还有好多的字要打-ram modules, Verilog program implementation, there are a lot of words Yaoda
ramtest
- 用verilog语言往内部FPGA的sram中读写数据，即把1—4写入ram的1—4的地址里-Verilog language within the FPGA with the sram to read and write data, that is 1-4, 1-4 to write the address in ram
DualPortRAM
- 此程序是Verilog HDL语言读写RAM的程序希望大家有用-This is Verilog HDL Promang
dp_ram
- 双口RAM的设计，采用Verilog HDL语言编写。-Dual-port RAM design, using Verilog HDL language.
idt71v416s10
- code for ram in verilog hdl
LIP2321CORE_cpu_local_ram
- CPU Local RAM Verilog Module
ex9_cof_M4K_test1
- ram的Verilog实现，很不错-ram of the Verilog implementation, very good ~~~~~
fh_ram_s_w_r_16_512
- 单口串行可读写16x512的ram的verilog源代码-singal serial writeable and readable 16x512 ram
Abus_fifo_ram_V1
- 该模块是基于verilog语言编写的双口ram模块，可将该该模块作为缓存模块使用-surpost ram write/read
AWSEQ_RAM_RW_A_DFF
- Verilog AWSEQ RAM DFF Verilog code
EDA_dianzhen
- 使用verilog语言写的16*16的点阵，能够实现左移、右移、暂停、复位等功能，可以自己定制RAM，改变显示的内容。-Verilog language written using the 16* 16 dot matrix, to achieve left, right, pause, reset and other functions, you can customize RAM, change the display content.
doublefloat_RAM
- 使用verilog编写的一个双浮点RAM，支持对字、字节、半字、双字的读写，包含testbench和wave.do文件-Use verilog to implement a double float RAM, supporting the read and write of halfword,byte,word,double word. It includes the testbench and wave.do